Jobs at Amd

WHAT YOU DO AT AMD CHANGES EVERYTHING

At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond.

Together, we advance your career.

The Role

This role is an excellent opportunity to work on the cutting-edge next generation technologies that will be part of future AMD Microprocessors powering Servers and Personal Computers as well as Graphics Cards and VR sets. You will join one of the fastest-growing field of Chiplet Interconnect technology rapidly being adopted across the VLSI industry. The team works on supporting both AMD proprietary I/O protocols and is also a key driver for industry standard

WHAT YOU DO AT AMD CHANGES EVERYTHING

At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond.

Together, we advance your career.

The Role

This role is an excellent opportunity to work on the cutting-edge next generation technologies that will be part of future AMD Microprocessors powering Servers and Personal Computers as well as Graphics Cards and VR sets. You will join one of the fastest-growing field of Chiplet Interconnect technology rapidly being adopted across the VLSI industry. The team works on supporting both AMD proprietary I/O protocols and is also a key driver for industry standard Universal Chiplet Interconnect Express (UCIe and Ultra Accelerator Link (UALink) The IP portfolio caters to short/ultra-short reach die-2-die interconnect with different bounding boxes tied to beachfront, Power, BER requirements. As a member of this team, you get a chance to work on IP development, drive design-specification, work on digital design and collaborate in the whole spectrum of areas include DFT, Firmware, Design verification, and Physical Design.

The Person

Enjoys being an environment where they can grow and learn with sense of team spirit

Strong analytical thinking and problem-solving skills, excellent attention to detail. Eager to learn new designs and implementation techniques. Must have good collaboration and interpersonal skills. Excellent communication skills with leadership qualities

Key Responsibilities

• Experience with I/O protocols like USB, PCIe, CXL.
• Experience in developing micro-architecture for any given module.
• RTL design experience with multi-clock, high frequency designs, low latency, low power & high performance.
• Debugging/Post Silicon Bring up
• Good Documentation and presentation skills.
• Micro-architecture of simple to complex digital blocks.
• RTL development using best industry practices.
• Optimize design for key metrics like Area, Power, Performance etc.
• Ability to work with cross-functional teams like DFT, Implementation, Verification, Emulation, Firmware regularly.

Preferred Experience

• Experience in digital front-end implementation, including micro-arch. definition
• Experience with scripting/automation languages like Python/Perl
• Firmware on Hardware-Firmware co-design
• Experience with state-of-the-art industry standard digital tools
• Preferred experience in design with multiple clock domains
• RTL design experience with multi-clock, high frequency designs
• Knowledge in digital RTL Digital Design and Implementation
• Experience with Synthesis, Equivalence Checking, Clock-Domain Crossing (CDC) Analysis, Area/Power optimizations, Linting, Static Timing Analysis (STA)

Academic Credentials

Master’s/Bachelor’s in electrical engineering or equivalent preferred

LOCATION:

Vancouver, BC (Open to Markham, ON)

Benefits offered are described: AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.

This posting is for an existing vacancy.

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ADVANCE YOUR CAREER. ADVANCE THE WORLD.

At AMD, we believe technology can change lives for the better. It can heal us, entertain us, and make us more connected, productive, and understanding of the world around us. And we’re looking for talent who feel the same: people who want to leave the planet better than they found it, those who don’t shy away from humanity’s challenges but are determined to help solve them.

ADVANCE YOUR CAREER. ADVANCE THE WORLD.

At AMD, we believe technology can change lives for the better. It can heal us, entertain us, and make us more connected, productive, and understanding of the world around us. And we’re looking for talent who feel the same: people who want to leave the planet better than they found it, those who don’t shy away from humanity’s challenges but are determined to help solve them.

AMD is powering the next generation of supercomputing, high-performance computing, cloud, and AI. Whether you’re designing next-gen processors, enabling AI breakthroughs, or creating go-to-market plans, every role at AMD contributes to something bigger — technology that moves the world forward.

The Department

Central DFX (CDFX) is a centralized ASIC design group within AMD’s Technology and Engineering organization. CDFX has a global footprint with design teams located in several AMD offices in North America and Asia. Our mandate is to optimize and standardize design methodology, design and implementation of critical Design-for-Test (DFT) and Design-for-Debug (DFD) features for complex state-of-the-art APU computing, game console and GPU graphics products. It is also responsible for DFX design methodology and CAD automation tools development to support the global DFX engineering teams across AMD.

The Person

You have a passion for modern, complex processor architecture, digital design, and verification in general. You are a team player who has excellent communication skills. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems.

Key Responsibilities

• Lead a team of DFT engineers, providing technical direction, mentorship, and performance feedback.
• Understand Design-for-Test (DFT) architecture
• Implement and deploy automated design flows to implement DFT features in a complex SOC ASIC design or IP subsystem
• Setup and execute design checks using both industry standard and in-house tools
• Deliver Perl, python, TCL scripts that provide scalable solutions key to DFT implementation
• Monitor CAD and/or IP regression results, debug failures and analyze coverage
• Develop in-house automation, utilities, intranet web portal, AI/ML applications

Preferred Experience

• Experience with Perl/Python/Shell scripting, C++, SQL
• Experience with AI/ML application
• Good object oriented programming skills
• Digital circuits and VLSI knowledge
• Strong problem solving skills
• Good written and oral communication skills
• Team player with strong interpersonal skills

Academic Credentials

• Bachelors or Masters degree in computer engineering/Electrical Engineering

LOCATION: Markham, ON

Benefits offered are described: AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.

This posting is for an existing vacancy.

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WHAT YOU DO AT AMD CHANGES EVERYTHING

At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond.

Together, we advance your career.

The Role

This role is an excellent opportunity to work on the cutting-edge next generation technologies that will be part of future AMD Microprocessors powering Servers and Personal Computers as well as Graphics Cards and VR sets. You will join one of the fastest-growing field of Chiplet Interconnect technology rapidly being adopted across the VLSI industry. The team works on supporting both AMD proprietary I/O protocols and is also a key driver for industry standard

WHAT YOU DO AT AMD CHANGES EVERYTHING

At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond.

Together, we advance your career.

The Role

This role is an excellent opportunity to work on the cutting-edge next generation technologies that will be part of future AMD Microprocessors powering Servers and Personal Computers as well as Graphics Cards and VR sets. You will join one of the fastest-growing field of Chiplet Interconnect technology rapidly being adopted across the VLSI industry. The team works on supporting both AMD proprietary I/O protocols and is also a key driver for industry standard Universal Chiplet Interconnect Express (UCIe and Ultra Accelerator Link (UALink) The IP portfolio caters to short/ultra-short reach die-2-die interconnect with different bounding boxes tied to beachfront, Power, BER requirements. As a member of this team, you get a chance to work on IP development, drive design-specification, work on digital design and collaborate in the whole spectrum of areas include DFT, Firmware, Design verification, and Physical Design.

The Person

Enjoys being an environment where they can grow and learn with sense of team spirit

Strong analytical thinking and problem-solving skills, excellent attention to detail. Eager to learn new designs and implementation techniques. Must have good collaboration and interpersonal skills. Excellent communication skills with leadership qualities

Key Responsibilities

• Experience with I/O protocols like USB, PCIe, CXL.
• Experience in developing micro-architecture for any given module.
• RTL design experience with multi-clock, high frequency designs, low latency, low power & high performance.
• Debugging/Post Silicon Bring up
• Good Documentation and presentation skills.
• Micro-architecture of simple to complex digital blocks.
• RTL development using best industry practices.
• Optimize design for key metrics like Area, Power, Performance etc.
• Ability to work with cross-functional teams like DFT, Implementation, Verification, Emulation, Firmware regularly.

Preferred Experience

• Experience in digital front-end implementation, including micro-arch. definition
• Experience with scripting/automation languages like Python/Perl
• Firmware on Hardware-Firmware co-design
• Experience with state-of-the-art industry standard digital tools
• Preferred experience in design with multiple clock domains
• RTL design experience with multi-clock, high frequency designs
• Knowledge in digital RTL Digital Design and Implementation
• Experience with Synthesis, Equivalence Checking, Clock-Domain Crossing (CDC) Analysis, Area/Power optimizations, Linting, Static Timing Analysis (STA)

Academic Credentials

Master’s/Bachelor’s in electrical engineering or equivalent preferred

LOCATION:

Vancouver, BC (Open to Markham, ON)

Benefits offered are described: AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.

This posting is for an existing vacancy.

#J-18808-Ljbffr

ADVANCE YOUR CAREER. ADVANCE THE WORLD. At AMD, we believe technology can change lives for the better. It can heal us, entertain us, and make us more connected, productive, and understanding of the world around us. And we’re looking for talent who feel the same: people who want to leave the planet better than they found it, those who don’t shy away from humanity’s challenges but are determined to help solve them.

ADVANCE YOUR CAREER. ADVANCE THE WORLD. At AMD, we believe technology can change lives for the better. It can heal us, entertain us, and make us more connected, productive, and understanding of the world around us. And we’re looking for talent who feel the same: people who want to leave the planet better than they found it, those who don’t shy away from humanity’s challenges but are determined to help solve them.

AMD is powering the next generation of supercomputing, high-performance computing, cloud, and AI. Whether you’re designing next-gen processors, enabling AI breakthroughs, or creating go-to-market plans, every role at AMD contributes to something bigger—technology that moves the world forward.

The Role

AMD is looking for a highly motivated Digital Design Engineer to join our team developing next-generation PCI Express (PCIe) IP that powers AMD's industry-leading server, client, GPU, and semi-custom products. In this role, you will contribute to all aspects of ASIC RTL design, from architecture definition and microarchitecture development through implementation, verification support, and post-silicon bring-up. You will collaborate with a talented global team to create innovative, high-performance, and power-efficient designs that enable cutting-edge computing solutions.

The Person

The ideal candidate is a passionate and detail-oriented engineer who enjoys solving complex technical challenges and delivering high-quality results. You are driven by continuous learning, thrive in collaborative environments, and take ownership of your work from concept to completion. You communicate effectively across cross-functional teams and demonstrate a strong commitment to innovation, execution, and engineering excellence.

Key Characteristics For Success Include

• Strong problem-solving and analytical skills with a focus on quality and execution.
• Self-motivated learner with the ability to quickly acquire new technical skills.
• Collaborative team player who can also work independently with minimal guidance.
• Effective communicator capable of clearly presenting technical concepts and ideas.
• Creative thinker with a passion for innovation and attention to detail.
• Committed to meeting project milestones while maintaining engineering rigor.

Key Responsibilities

• Design and develop RTL for AMD's PCI Express (PCIe) IP used across next-generation server, client, GPU, and semi-custom products.
• Partner with architects and design teams to define and implement innovative microarchitectural features.
• Drive high-quality RTL development with focus on timing closure, CDC analysis, lint compliance, and overall design robustness.
• Implement and optimize low-power design techniques while maintaining performance and functionality targets.
• Collaborate with verification engineers to support simulation, debug, validation, and issue resolution throughout the project lifecycle.
• Participate in silicon bring-up activities and contribute to debugging post-silicon and customer-reported issues.
• Support design reviews and continuously improve design methodologies and development processes.

Preferred Experience

• Extensive experience in ASIC/SoC digital design and RTL development using Verilog/SystemVerilog.
• Strong understanding of synchronous digital design principles and multi-clock domain implementations.
• Hands-on experience with lint, CDC, and timing analysis methodologies and tools.
• Experience creating or contributing to technical specifications and microarchitecture documentation.
• Knowledge of low-power design techniques and ASIC design flows.
• Familiarity with silicon validation and hardware debug using lab equipment such as logic analyzers and oscilloscopes.
• Understanding of high-speed interface protocols such as PCI Express (PCIe), USB, SATA, Ethernet, or similar technologies.
• Experience collaborating across architecture, verification, physical design, and silicon validation teams.

Academic Credentials

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, Engineering Science, or a related field.
• Master's degree preferred.

LOCATION

Vancouver, British Columbia, Canada

Benefits offered are described: AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.

This posting is for an existing vacancy.

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Overview

At AMD, our mission is to build great products that accelerate next‑generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond.

The Role

ASIC Design Engineer with hands‑on experience across all aspects of IP RTL design, including architecture development, RTL implementation, verification support, and silicon bring‑up. Proven expertise in leveraging and deploying AI‑generated RTL solutions in production silicon, driving improved design productivity, quality, and time‑to‑market while ensuring robust functionality and performance.

The Person

• Exhibits relentless commitment to help the team meet quality and development goals on schedule


• Drives to learn and perform at his or her highest potential in a technical capacity


• Thrives in both a team environment and in individual contribution


• Communicates openly and clearly in meetings, presentations, emails, and reports


• Able to learn independently and acquire new skills required for the job


• Creative and innovator and thinker who loves technical problems and detail‑oriented tasks

Key Responsibilities

• IP RTL design for AMDs PCI Express (PCIe) IP used for all next generation server, clients, GPU and Semi‑custom products.


• Work closely with IP and system architects to micro‑architect cutting edge features.


• Apply low power design techniques to existing logic and maintain overall system performance.


• Focus on timing, LINT and CDC closure to ensure high quality RTL.


• Support verification and debug of the ASIC throughout various stages of the project.

Preferred Experience

• Strong working experience in RTL coding using Verilog HDL


• Strong experience with integrating AI‑assisted design methodologies into advanced semiconductor development flows from concept through tapeout and post‑silicon validation.


• Experience in design with multiple clock domains


• Experience in using lint and CDC tools


• Experience in developing specification


• Understanding of high‑speed I/O protocols (PCIe, USB, SATA, Ethernet…)

Academic Credentials

• Bachelors or Masters degree in Computer Engineering/ Electrical Engineering

Location

Markham, Vancouver, Ottawa

Benefits

Benefits offered are described: AMD benefits at a glance.

Equal Opportunity

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee‑based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third‑party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

Responsible AI

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s \"Responsible AI Policy\" is available here.

Current Vacancy

This posting is for an existing vacancy.

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WHAT YOU DO AT AMD CHANGES EVERYTHING

At AMD, our mission is to build great products that accelerate next‑generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond.

Together, we advance your career.

We are looking for an adaptive, self‑motivated USB systems engineer to join our growing team. As a key contributor, you will have a strong technical background to contribute to all aspects of the USB feature enablement process. In this role, you will have ownership of USB requirements delivery and drive feature enablement to completion.

The Person

You’re a highly motivated team player with a strong development background, problem‑solving mentality, excellent communication skills, ability to prioritise tasks and willingness to learn and adapt. Excellent teamwork skills and capable of working independently.

Key Responsibilities

• Enable USB IP, Power Delivery and Retimer Features on the latest AMD Client and Gaming Systems.
• Use protocol analyzers, SW tools and test devices to debug Systems, HW and SW USB Failures.
• Define Systems Requirements (board, software, retimer, power delivery) based on the USB interface specifications.
• Review USB internal and external technical specifications to define feature lists and methods to test them in pre and post‑silicon environment.
• Interface between AMD and external Power Delivery, Retimer and Device vendors to enable, debug and root cause USB failures.
• Independent and joint collaboration between multi‑functional teams for development, testing, debugging and implement requirements for enterprise application.
• Excellent teamwork skills and capable of working independently.
• Particularly good communicator, able to engage and effectively respond to diverse partners.
• Able to proactively support team culture that fosters knowledge sharing, excellence, and collaboration.

Preferred Experience

• Proven systems enablement debug experience.
• Experience in using and analysing High‑Speed protocol traces for USB, Display Port and USB.
• Skilled in scripting languages such as Perl, Ruby, and Shell script.
• Proficient with Computer Architecture and x86 Systems Architecture.
• Capable of reviewing, debugging and modifying C/C++ based firmware.
• Ability to review circuit schematics and identify board re‑works.
• Good balance of hardware, architecture, and software expertise.
• Great teammate with excellent collaborative skills.
• Familiar with Windows, UEFI and Linux/Unix OS.

Academic Credentials

• Bachelor’s/Master’s degree in Electrical or Computer Engineering strongly preferred.

Location

Markham, Ontario, Canada

Visa

This role is not eligible for Visa Sponsorship.

Benefits

Benefits offered are described: AMD benefits at a glance.

Equal Opportunity

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee‑based recruitment services. AMD and its subsidiaries are equal‑opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third‑party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

AI Screening

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.

Posting

This posting is for an existing vacancy.

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At AMD, our mission is to build great products that accelerate next‑generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond.

The Role

The AMD IOHUB Team (part of the NBIO organization) is looking for an ASIC Design Engineer to join our growing team. We develop leading‑edge I/O connectivity and virtualization technologies powering data center and machine learning workloads. This team is part of the development for tomorrow’s client, server, embedded, graphics, and semi‑custom chips. You will be involved in all aspects of IP design starting from architecture to requirements to execution. As a key contributor to the success of AMD’s IP, you will be part of a leading team to drive and improve AMD’s abilities to deliver the highest quality, industry leading technologies to market. The NBIO Team fosters and encourages continuous technical innovation to showcase successes as well as facilitate continuous career development.

The Person

The ideal candidate is a detail‑oriented and driven ASIC design engineer who enjoys solving complex technical challenges and seeing work through to successful completion. You combine strong analytical and problem‑solving abilities with excellent communication and collaboration skills, allowing you to work effectively across globally distributed engineering teams. You are proactive, adaptable, and comfortable navigating ambiguity while maintaining a focus on quality and execution.

You bring a strong sense of ownership, accountability, and professionalism to your work, along with the ability to build trusted relationships with peers and stakeholders. Success in this role requires sound technical judgment, effective time management, and the ability to clearly communicate technical concepts, status, and risks to diverse audiences. You are a continuous learner who embraces feedback, seeks opportunities to improve processes, and enjoys mentoring others while remaining hands‑on and engaged in solving challenging engineering problems.

In this role, you will work closely with IP and SoC design teams across the globe to drive design quality, support integration, and help resolve complex synthesis, timing, and physical implementation challenges. You will have the opportunity to contribute to high‑impact technology, collaborate with multi‑disciplinary engineering teams, and help advance AMD's ability to deliver industry‑leading products to market.

Key Responsibilities

• Understand the functional and performance requirements of the IOHUB within various SOCs
• Drive IP/SOC design infra decisions to ensure consumption within the context of the SOC
• Provide guidance and/or act as a liaison between IP and SOC design teams for synthesis and physical layout issues
• Scope requirements and resources to meet project schedules
• Provide hands‑on leadership of a small team of Engineers/Engineers in Training as required to meet program development goals
• Sign‑off IP quality for delivery into SOC
• Effectively communicate with multi‑disciplined teams located across the globe
• Gather, attend and present into technical status meetings on a weekly/bi‑weekly basis

Preferred Experience

• Proven ASIC design experience, RTL design experience on large ASIC development projects
• Strong background working with industry standard synthesis tools, flows and back end timing closure (e.g., Formality, CDC & Linting tools, Design Compiler/FX etc)
• Strong background in Verilog and System Verilog
• Strong analytical skills and attention to detail
• Excellent written and communication skills
• Understanding of the IP integration and interactions within an SOC
• Must be a self‑starter and able to independently drive tasks to completion
• Demonstrates the ability to debug issues and quickly identify viable solutions
• Team player with proven leadership skills

Academic Experience

• Bachelor of Science Degree in Electrical Engineering, Computer Science, or Computer Engineering

Location: Markham, ON, Vancouver, BC.

This role is not eligible for visa sponsorship.

Benefits offered are described: AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee‑based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third‑party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.

This posting is for an existing vacancy.

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Welcome to RNstaff, where compassion connects careers. We're not just a recruiting company; we're people who care about people. Join us in shaping the future of healthcare together.

VISA SPONSORSHIP AVAILABLE
MUST BE IN US
Location: Georgia
Position: Registered Nurse
Unit: Dialysis

Description:

Must Have Skills/Experience: experience; 1 years

" Required Education: Associate Nursing or higher with state RN license

GA STATE LICENSE ACCEPTED

Ann Dizon
Account Manager
Mobile: (phone number removed)
(url removed)

At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond.

In this role you will be given an opportunity to work on the next generation technology that will be part of future AMD Microprocessors powering Servers and Personal Computers as well as Graphics Cards and VR sets. The DXIO FEINT/Implementation team is responsible for Synthesis, place & Route, Timing closure/CDC/LINT/DFx for very high speed (>2G) design with complex I/O clocking.

As a seasoned Physical Design engineer, you will be working with a diverse team of physical design engineers, RTL design engineers, and managers from NBIO IP team. You will drive physical implementation of IP through the entire physical design flow to achieve best PPA, while shortening the overall development schedule. This role provides an excellent opportunity for robust individuals looking to make a difference.

Key Responsibilities

• Drive all implementation aspects of next generation of IPs, including multiple I/O protocols such as PCIe, UCIe, UALink & Infinity Fabric link‑layer.
• Own implementation activities: Synthesis, floorplan, placement, clock tree synthesis, routing, and STA closure for high‑speed (>2G) designs with complex clocking infrastructures.
• Work on cutting edge IP for these I/O protocols to achieve physical implementation with best PPA, developing reference floorplans, implementation scripts for SoCs worldwide, and supporting SoCs worldwide.

Preferred Experience

• Synthesis, floor‑planning, placement, clock tree synthesis, post‑route timing closure for high‑speed >=2GHz designs.
• Experience with STA, the physical design flow and scripting in TCL, Python.
• Fusion Compiler experience (preferred).

Academic Credentials

• Bachelors or Masters degree in Computer Engineering, Electrical Engineering, or related field.

Location: Markham, Vancouver, Ottawa.

Benefits offered are described: AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee‑based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third‑party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.

This posting is for an existing vacancy.

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Indent: SF_OP_(phone number removed)-1 / SF_OP_(phone number removed)-2
Role: GPU Infrastructure Architect - GPU Cluster Stand-up, Configuration & Operations (AMD MI350)
Location: San Jose CA (Remote is also an option)
1st Preference – FTE – Max Salary: $160K/annum
2nd Preference – Contract – Max Rate: $100/hr

Role Summary
The GPU Cluster Architect is responsible for designing, provisioning, and operating AMD MI350–based GPU clusters on a cloud platform. The role ensures scalable, secure, and reproducible GPU infrastructure to support distributed training and high-performance workloads.

Key Responsibilities

• Design end-to-end GPU cluster architecture covering compute, networking, storage, and control services.
• Provision and operationalize up to 9 AMD MI350 GPU clusters based on confirmed cloud SKU availability.
• Configure GPU compute nodes including base OS images, GPU drivers, runtime libraries, and distributed training dependencies.
• Implement automation for node imaging, bootstrapping, lifecycle management, patching, and upgrades.
• Standardize environments using reproducible builds and Infrastructure-as-Code (IaC).
• Enable workload portability through containerized environments and documented deployment patterns.
• Implement OS baseline hardening, restricted administrative access, and secure cluster access controls.
• Establish monitoring, logging, and operational runbooks to ensure reliability and performance.

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