Hardware Jobs

System Development Division (SDD) is focused on delivering National Defense capabilities by driving mission-focused strategies to develop advanced technology systems enabling enduring products and solutions focused on achieving the customer vision. Our programs deliver sustainable, reliable, and cost-efficient capabilities focused on end-customer needs that function in operationally relevant environments and timeframes. SDD considers the entire lifecycle of the solution, from conceptualization and architecting, through development to deployment, while leveraging novel technologies to deliver first-of-a-kind systems. SDD is seeking a Lead Firmware Engineer with a strong understanding of digital signal processing as applicable to radar to implement complex system algorithms and interfaces in FPGAs for Radar and EW systems. Applicable projects span all levels of maturity from initial concept generation through design, prototype, development, test, and transition to production. In this role, you will implement, test, and verify designs through simulation and lab test. These FPGA designs could include signal processing across very wide bands, high data rate interfaces, serial interfaces, and complex control logic. Additionally, you will support the effort to evaluate current and future system capabilities, identify improved applications and techniques, and ultimately recommend solutions. This position requires skills in working with multidisciplinary teams, supporting development and test activities, as well as technical proficiency in relevant technologies. Strong interpersonal, communication, and technical skills are also required. Applicants are expected to be self-motivated, detail oriented and have a demonstrated ability to effectively communicate with all levels of management and individual contributors on the program team through strong written and verbal communication skills. What you will do: Map system-level radar requirements and algorithms to efficient FPGA architectures Design and implement radar signal processing algorithms in FPGAs (pulse compression, FFT processing, CFAR detection, beamforming, Doppler processing) Develop high-throughput, low-latency processing architectures for real-time radar applications Implement waveform generation, digital down-conversion, and channelization in FPGA fabric Design and optimize pipelined arithmetic units and custom DSP blocks for radar processing Interface FPGAs with high-speed ADCs/DACs for radar RF front-end integration Validating designs with simulation and verification techniques before hardware integration Participating in FPGA development process improvement Supporting full life cycle of development and integration of FPGA firmware into hardware systems Creating and maintaining design documentation and test plans Delivering technical briefings to a range of internal and external stakeholders Coordinating with program managers and technical leads to manage task schedules and budgets Providing mentorship to more junior engineers to accelerate their technical and professional development Building and maintaining high-performing and empowered technical teams Who you are: This position requires the ability to obtain a Top Secret (TS) security clearance, for which U.S. citizenship is needed by U.S. Government Bachelor’s degree and at least 7 years of applicable experience, a Master’s degree and at least 5 years of applicable experience, or PhD and at least 2 years of applicable experience. Equivalent experience will be considered. Experience with FPGA and SoC design entry using Verilog or VHDL Experience implementing digital signal processing techniques, filter design, FFT/DFT, fixed-point optimization Experience with design flow for Xilinx and/or Intel FPGAs Experience with simulation tools such as ModelSim/Questa, VCS, or Incisive Demonstrated desire to successfully pursue new challenges, improve and broaden technical skills, seek greater responsibilities, and increase individual value to the organization Capable of effectively working in a team environment, often under tight deadlines Nice to Haves: Active Security Clearance at the Secret or Top Secret level Proficient with Xilinx or Altera SoC platforms Proficient with FPGA or ASIC RTL design entry Strong background and experience with industry best practices and version control Proficient with complex timing closure Experience with Matlab, Python, or C/C++ Experience with interfacing to high speed DACs and ADCs Knowledge of pulse compression, Doppler processing, beamforming, detection algorithms Previous experience with RFSoC or Analog Devices ADC/DAC Understanding of RF Systems, specifically radar or EW Pay Information Full-Time Salary Range: $157,000 - $224,000 The salary range listed is based on external market data. Final offers are based on factors, such as but not limited to, the candidate’s experience, education, training, key skills/critical skills, security clearances, and prevailing market and business conditions. STR is a growing technology company with locations near Boston, MA, Arlington, VA, near Dayton, OH, Melbourne, FL, and Carlsbad, CA. We specialize in advanced research and development for defense, intelligence, and national security in: cyber; next generation sensors, radar, sonar, communications, and electronic warfare; and artificial intelligence algorithms and analytics to make sense of the complexity that is exploding around us. STR is committed to creating a collaborative learning environment that supports deep technical understanding and recognizes the contributions and achievements of all team members. Our work is challenging, and we go home at night knowing that we pushed the envelope of technology and made the world safer. STR is not just any company. Our people, culture, and attitude along with their unique set of skills, experiences, and perspectives put us on a trajectory to change the world. We can't do it alone, though - we need fellow trailblazers. If you are one, join our team and help to keep our society safe! Visit us at www.str.us for more info. STR is an equal opportunity employer. We are fully dedicated to hiring the most qualified candidate regardless of race, color, religion, sex (including gender identity, sexual orientation and pregnancy), marital status, national origin, age, veteran status, disability, genetic information or any other characteristic protected by federal, state or local laws. If you need a reasonable accommodation for any portion of the employment process, email us at appassist@str.us and provide your contact info. Pursuant to applicable federal law and regulations, positions at STR require employees to obtain national security clearances and satisfy the requirements for compliance with export control and other applicable laws.

As an FPGA Engineer, you’ll work side-by-side with teammates to build real-world applications that power a global trading firm. You’ll create solutions with nanosecond response times, highly parallelized algorithms, and customized low-level networking that solve business challenges effectively and efficiently. Collaborating closely with our business, you’ll have in-depth insight into a problem before developing the solution. Optiver is building with cutting edge AI technology in the most competitive, data rich landscapes in the world: financial markets. That means no two days are the same, and every day brings new, exciting technical challenges to solve. What you’ll do Your onboarding In the first eight weeks, you will participate in Optiver’s comprehensive Global Academy and be equipped with the knowledge needed to make an impact the moment you join your team. The comprehensive training covers trading theory and Optiver’s tech stack to hone your skills for your role. In addition, you will be paired with a dedicated mentor who will empower you to take ownership of your work and make a difference at the firm. Your responsibilities Accelerate network infrastructure and trading system components with high-speed hardware designs. Research new low-latency techniques and platforms and identify opportunities for integration with our trading system. Collaborate in a multidisciplinary team of traders, software developers, and infrastructure engineers. Leverage the best hardware available or build in-house versions to ensure our FPGAs can interface with cutting-edge server hardware. What you’ll get You’ll join a culture of collaboration and excellence, surrounded by curious thinkers and creative problem-solvers. Motivated by a passion for continuous improvement, you’ll thrive in a supportive, high-performing environment alongside talented colleagues, collectively tackling some of the toughest challenges in the financial markets. In addition, you’ll receive: The opportunity to work alongside best-in-class professionals from over 40 different countries Highly competitive compensation package Global profit-sharing pool and performance-based bonus structure 401(k) match up to 50% Comprehensive health, mental, dental, vision, disability, and life coverage 25 paid vacation days alongside market holidays Extensive office perks, including breakfast, lunch and snacks, regular social events, clubs, sporting leagues and more Who you are: A student pursuing a bachelor’s, master’s, or PhD in Computer Engineering, Electrical Engineering, or another related field On track to graduate between December 2026 to June 2027 A student with strong engineering instincts and hands-on experience in digital design with FPGAs or ASICs Experienced in writing hardware in VHDL, Verilog, or System Verilog Passionate for writing clean code, well-architected systems, and continuous improvement A collaborative teammate comfortable working with developers, traders and business teams Who we are: Optiver is a leading technology- and research-driven trading firm. Our teams of scientists, engineers, mathematicians, and traders work side by side to develop, test, and scale ideas that shape how we understand and trade global markets. Powered by a global platform built for rapid experimentation and iteration, we combine the scientific rigor of a research institution with the pace of a technology company. Our differences are our edge. Optiver does not discriminate on the basis of race, religion, color, sex, gender identity, sexual orientation, age, physical or mental disability, or other legally protected characteristics. Optiver is supportive of US immigration sponsorship for this role. Optiver has a global application re-apply policy for our intern and graduate roles. If you have completed any portion of an online assessment or interviewed for an FPGA Engineer graduate or internship role at any Optiver location in the past 8 months, please note that you are not yet eligible to reapply. We welcome you to re-apply to after the 8-month cool off period. Below is the expected base salary for this position. This is a good-faith estimate of the base pay scale for this position and offers will ultimately be determined based on experience, education, skill set, and performance in the interview process. This position will also be eligible for a discretionary bonus (if determined by Optiver) and Optiver’s benefits package with the benefits listed above. Base Salary Range $200,000 — $200,000 USD